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authorAlexey Gavrilov <rebovas@yahoo.com>2024-05-24 14:07:47 +0700
committerAlexey Gavrilov <rebovas@yahoo.com>2024-05-24 14:07:47 +0700
commit5fbf41e967ed8e413ecf1e6abb72e8d285169df4 (patch)
tree48e25b199ae3459e12c7202f7b18a37cd087bf9b /arch/x86/port/PortOps.cpp
parent0a50b1758fd3da118408fd724825d0a50a9ecf17 (diff)
Pic + Tuple + refactor PrimaryInitialization class
Diffstat (limited to 'arch/x86/port/PortOps.cpp')
-rw-r--r--arch/x86/port/PortOps.cpp62
1 files changed, 62 insertions, 0 deletions
diff --git a/arch/x86/port/PortOps.cpp b/arch/x86/port/PortOps.cpp
new file mode 100644
index 0000000..4b418dd
--- /dev/null
+++ b/arch/x86/port/PortOps.cpp
@@ -0,0 +1,62 @@
+#include "PortOps.h"
+
+
+void PortOps::outb(portadr port, regb value)
+{
+ asm("outb %b0, %w1"
+ :
+ : "a"(value), "Nd"(port)
+ : "memory");
+};
+
+void PortOps::outw(portadr port, regw value)
+{
+ asm("out %w0, %w1"
+ :
+ : "a"(value), "Nd"(port)
+ : "memory");
+};
+
+void PortOps::outl(portadr port, regl value)
+{
+ asm("out %k0, %w1"
+ :
+ : "a"(value), "Nd"(port)
+ : "memory");
+};
+
+regb PortOps::inb(portadr port)
+{
+ regb res;
+
+ asm("in %w1, %b0"
+ : "=a"(res)
+ : "Nd"(port)
+ : "memory");
+
+ return res;
+};
+
+regw PortOps::inw(portadr port)
+{
+ regw res;
+
+ asm("in %w1, %w0"
+ : "=a"(res)
+ : "Nd"(port)
+ : "memory");
+
+ return res;
+};
+
+regl PortOps::inl(portadr port)
+{
+ regl res;
+
+ asm("in %w1, %k0"
+ : "=a"(res)
+ : "Nd"(port)
+ : "memory");
+
+ return res;
+};